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Backward compatible to USB specification Revision 1.1.Downstream ports support HS, FS, and low-speed (LS) traffic.Upstream port supports both high-speed (HS) and full-speed (FS) traffic.Compliant with USB specification Revision 2.0.
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- Superior performance when multiple FS devices operate concurrently.
- Provides dedicated TT control logics for each downstream port.
- Supports 7 USB 2.0 compliant downstream ports.
- Integrates two standard USB 4-port hub silicon dies into single chip.
- Multiple Chip Package (MCP) architecture.
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*Note 1: TT (transaction translator) is the main traffic control engine in an USB 2.0 hub to handle the unbalanced traffic speed between the upstream port and the downstream ports. Please refer to design guide for PCB layout suggestions. The chip-to-chip clock trace is relatively sensitive to PCB noise. The output clock provides enough driving capacity to support up to 2 devices that connected to the downstream port. GL854G provides 12MHz clock output that can be used as a reference clock source for multi-chip, hub compound applications. External EEPROM can be removed if no vendor specified PID/VID or product string is required for the application. The microprocessor detects general purpose I/O (GPIO) status during the initial stage to configure hub settings such as (1) declare of compound device (2) gang/individual mode selection…etc. GL854G implements multiple hub configuration features onto internal mask ROM, which traditionally requires external EEPROM. GL854G has proven compatibility, lower power consumption figure and better cost structure above all USB 2.0 hub solutions worldwide. The controller inherits Genesys Logic’s cutting edge technology on cost and power efficient serial interface design.
GL854G implements multiple TT* (Note1) architecture that provide dedicated TT* to each downstream (DS) ports, which guarantee Full-Speed(FS) data passing bandwidth when multiple FS device perform heavy loading operations. GL854G is Genesys Logic’s premium 7-port hub solution which fully complies with Universal Serial Bus Specification Revision 2.0.